1. Field of the Invention
The present invention relates to a probe card for a wafer test (inspection jig for a wafer test) of a semiconductor device.
2. Description of the Related Art
FIG. 4 is a configurational view showing the outline of a probe part when a wafer test is conducted in the related art. In FIG. 4, reference numeral 1 denotes a wafer stage for supporting a wafer 2 to be measured; 3 denotes a test head; 4 denotes a performance board; 5 denotes a POGO pin ring; 6 denotes a probe card substrate; 7 denotes a probe needle; and the probe card substrate 6 and the probe needle 7 constitute a probe card 8.
A semiconductor device undergoes a wafer test by the configuration shown in FIG. 4 at the step of a wafer. At this time, the probe needle 7 of the probe card 8 flaws the pad of the wafer 2 to be measured to establish an electric contact, thereby inspecting the function of the semiconductor device with a tester.
FIG. 5 is a configurational view showing a vertical type probe card in the related art. In FIG. 5, reference numeral 6 denotes a probe card substrate; 7 denotes a probe needle; 9 denotes a space transformer; and 10 denotes a wiring.
In this vertical type probe card, the probe card substrate 6 is connected to the probe needle 7 via the space transformer 9 through the wiring 10 made of a Nichrome wire, a coaxial cable or the like and the wiring 10 is connected with solder.
In this case, there are presented the following problems: that is, the soldering of the wiring 10 becomes difficult and the manufacturing time increases with the increasing packing density of the semiconductor device and the increasing density of the probe needles 7 caused by the increasing of the number of pads; and the increasing density of the wirings 10 reduces the waveform transmitting performance between the probe card substrate 6 and the probe needle 7 and makes it impossible to respond to the speed-up of the semiconductor device (the increasing of an operating frequency).
In order to solve such problems, in particular, in order to respond to the speed-up of the semiconductor device, there is proposed a probe card having a structure shown in FIG. 6.
FIG. 6 is a configurational view showing a probe card employing an interposer substrate in the related art. In FIG. 6, reference numeral 11 denotes a probe card substrate; 12 denotes an interposer substrate soldered to the bottom surface of the probe card substrate 11; 13 denotes probe needles formed in such a way as to be put into electric contact with the bottom surface of the interposer substrate 12; 14a to 14d denote stiffeners for supporting the probe card substrate 11; 15a and 15b denote the positioning holes of the probe needles 13 made in the stiffeners 14b and 14d; 16a and 16b denote positioning pins inserted into the positioning holes 15a and 15b to fix the probe needles 13.
In FIG. 6, the interposer substrate 12 is soldered to the bottom surface of the probe card substrate 11 and the probe needles 13 are formed such that they are put into electric contact with the bottom surface of the interposer substrate 12. The probe needles 13 are positioned and fixed to the interposer substrate 12 by arranging the probe needles 13 from the bottom surface side of the interposer substrate 12 and by inserting the positioning pins 16a and 16b into the positioning holes 15a and 15b made in the stiffeners 14a and 14d. 
Since the probe card in the related art is constituted in the foregoing manner, in the probe card shown in FIG. 6, the interposer substrate 12 itself is apt to be reduced in thickness because the interposer substrate 12 is easily formed.
However, if the interposer substrate 12 becomes thinner, also the positioning holes 15a and 15b formed in the stiffeners 14b and 14d need to be made shallow, thereby insufficiently fixing the probe needles 13 to the interposer substrate 12 by the positioning pins 16a and 16b, which results in decreasing the accuracy of positioning the probe needles 13. In particular, if the thickness of the interposer substrate 12 becomes smaller than 1.2 mm, there is presented a problem that the accuracy of positioning decreases markedly.
Further, if the interposer substrate 12 becomes thinner, when the probe needles 13 press the wafer 2 to be measured, the interposer substrate 12 is warped by the pressure applied to the interposer substrate 12 by probe needles 13, which presents a problem that this warping of the substrate 12 causes instability in the contact near the solder between the interposer substrate 12 and the probe card substrate 11 and flaws and breaks the interposer substrate 12.
Incidentally, in the configuration of the interposer substrate 12, in the case where a terminal pitch in the terminal layout of the probe card substrate 11 side is wider than a terminal pitch in the terminal layout of the probe needle 13 side, for example, the terminal pitch in the terminal layout of the probe card substrate 11 side is 0.8 mm and the terminal pitch in the terminal layout of the probe needle 13 side ranges from 0.1 mm to 0.2 mm, when the probe needles 13 press the wafer 2 to be measured, the probe needles 13 of from 9 to 16 pins are pushed up at least a region of 0.8 mmxc3x970.8 mm of the interposer substrate 12, so that a load as large as about from 1 to 2 kg is applied to the region of 0.8 mmxc3x970.8 mm of the interposer substrate 12.
The present invention has been made to solve the aforementioned problem and the object of the present invention is to provide a probe card capable of improving the positioning accuracy of the probe needles and preventing the warping of the interposer substrate.
According to an aspect of the present invention, there is provided a probe card having an offset substrate electrically connected between a probe card substrate and an interposer substrate.
Thus, it is possible to secure the thickness of the interposer substrate plus the thickness of the offset substrate for the depths of the positioning hole of the probe needle positioning member, which results in the improved positioning accuracy of the probe needle.
In addition, it is possible to provide the offset substrate with the bypass capacitor.
Here, resin may be fully stuffed between an offset substrate and the interposer substrate.
Thus, it is possible to prevent the electric connection between the offset substrate and the interposer substrate from being made unstable, and the fully stuffed resin integrates the offset substrate with the interposer substrate to increase thickness to thereby prevent the interposer substrate from being warped and flawed or broken.